±1 LSB INL; no missing codes. – Programmable throughput up to ksps. – 8 external inputs; programmable as single-ended or differential. Part Number: CF Manufacturer: Silicon Laboratories Description: Microcontrollers (MCU) M Kb 12ADC Download Data Sheet Docket. 2-cycle 16 x 16 MAC engine (CF/1/2/3 and. CF/1/2/3 Refer to the corresponding pages of the datasheet, as indicated in. Table , for a.

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Serial Port 1 Control Register Timer 2, Timer 3, and Dataeheet Port1 Output Mode Register Operating in Multiply Only Mode Highlighted features are listed below. Interrupts and SFR Paging Extended Interrupt Enable ADC2 Modes of Operation Priority Crossbar Decode Table This debug system supports inspec.

Port6 Output Mode Register Programming The Flash Memory Branch Target Cache Organiztion Timer 0 and Timer Instruction Set in 1 or 2 System Clocks. Typical Slave Transmitter Sequence Refer to Table 1. Crossbar Pin Assignment and Allocation Port2 Output Mode Register External Memory Interface Control Superior performance to emulation systems using.


Fractional Mode Data Representation Cache and Prefetch Optimization Configuring x8051f120 Output Modes of the Port Pins Configuring Port 1 Pins as Analog Inputs Voltage Reference Electrical Characteristics Data Pointer Low Byte Boundary Data Register Bit Definitions Typical Master Transmitter Sequence Analog Multiplexer and PGA External Memory Interface Pin Assignments Configuring Timer 2, 3, and 4 to Count Down Update Output Based on Timer Overflow Pinout and Package Definitions In-system, full-speed, datzsheet debug interface on-chip.

Timer 2, 3, and 4 Capture Register High Byte